PLL#

Phase-locked loop models.

Common Parameters: u, name

Common Variables: am

Available models: PLL1, PLL2

PLL1#

Simple Phasor Lock Loop (PLL) using one PI controller. The PI controller minimizes the error between the input and output angle.

Input bus angle signal -> Lag filter 1 with Tf -> Output angle af_y.

(af_y - am) -> PI Controller (Kp, Ki) -> PI_y

Estimated angle ae = (2 * pi * fn * PI_y) -> Lag filter 2 with Tp -> am.

The output signal is am, a state variable.

Parameters#

Name

Symbol

Description

Default

Unit

Properties

idx

unique device idx

u

\(u\)

connection status

1

bool

name

device name

bus

bus idx

mandatory

fn

\(f_n\)

nominal frequency

60

Hz

Kp

\(K_p\)

proportional gain

0.100

Ki

\(K_i\)

integral gain

0.100

Tf

\(T_f\)

input digital filter time const

0.050

sec

Tp

\(T_p\)

output filter time const.

0.050

sec

Variables#

Name

Symbol

Type

Description

Unit

Properties

af_y

\(y_{af}\)

State

State in lag transfer function

v_str

PI_xi

\(xi_{PI}\)

State

Integrator output

v_str

ae

\(\theta_{est}\)

State

PLL angle output before filter

v_str

am

\(\theta_{m}\)

State

PLL output angle after filtering

v_str

PI_y

\(y_{PI}\)

Algeb

PI output

v_str

a

\(\theta\)

ExtAlgeb

Bus voltage angle

Initialization Equations#

Name

Symbol

Type

Initial Value

af_y

\(y_{af}\)

State

\(\theta\)

PI_xi

\(xi_{PI}\)

State

\(0.0\)

ae

\(\theta_{est}\)

State

\(\theta\)

am

\(\theta_{m}\)

State

\(\theta\)

PI_y

\(y_{PI}\)

Algeb

\(K_{p} u \left(- \theta_{m} + y_{af}\right)\)

a

\(\theta\)

ExtAlgeb

Differential Equations#

Name

Symbol

Type

RHS of Equation "T x' = f(x, y)"

T (LHS)

af_y

\(y_{af}\)

State

\(\theta - y_{af}\)

\(T_f\)

PI_xi

\(xi_{PI}\)

State

\(K_{i} u \left(- \theta_{m} + y_{af}\right)\)

ae

\(\theta_{est}\)

State

\(2 \pi f_{n} y_{PI}\)

am

\(\theta_{m}\)

State

\(\theta_{est} - \theta_{m}\)

\(T_p\)

Algebraic Equations#

Name

Symbol

Type

RHS of Equation "0 = g(x, y)"

PI_y

\(y_{PI}\)

Algeb

\(K_{p} u \left(- \theta_{m} + y_{af}\right) + xi_{PI} - y_{PI}\)

a

\(\theta\)

ExtAlgeb

\(0\)

Blocks#

Name

Symbol

Type

Info

af

\(af\)

Lag

input angle signal filter

PI

\(PI\)

PIController

PI controller

Config Fields in [PLL1]

Option

Symbol

Value

Info

Accepted values

allow_adjust

1

allow adjusting upper or lower limits

(0, 1)

adjust_lower

0

adjust lower limit

(0, 1)

adjust_upper

1

adjust upper limit

(0, 1)

PLL2#

Synchronously-rotating Reference Frame (SRF) Phasor Lock Loop (PLL).

The PLL minimizes vq = v sin(a - am) using a PI controller.

The output signal is am, a state variable.

Parameters#

Name

Symbol

Description

Default

Unit

Properties

idx

unique device idx

u

\(u\)

connection status

1

bool

name

device name

bus

bus idx

mandatory

fn

\(f_n\)

nominal frequency

60

Hz

Kp

\(K_p\)

proportional gain

0.100

Ki

\(K_i\)

integral gain

0.100

Variables#

Name

Symbol

Type

Description

Unit

Properties

PI_xi

\(xi_{PI}\)

State

Integrator output

v_str

am

\(\theta_{m}\)

State

PLL angle output

v_str

PI_y

\(y_{PI}\)

Algeb

PI output

v_str

a

\(\theta\)

ExtAlgeb

Bus voltage angle

v

\(V\)

ExtAlgeb

Bus voltage magnitude

Initialization Equations#

Name

Symbol

Type

Initial Value

PI_xi

\(xi_{PI}\)

State

\(0\)

am

\(\theta_{m}\)

State

\(\theta\)

PI_y

\(y_{PI}\)

Algeb

\(K_{p} V \sin{\left(\theta - \theta_{m} \right)}\)

a

\(\theta\)

ExtAlgeb

v

\(V\)

ExtAlgeb

Differential Equations#

Name

Symbol

Type

RHS of Equation "T x' = f(x, y)"

T (LHS)

PI_xi

\(xi_{PI}\)

State

\(K_{i} V \sin{\left(\theta - \theta_{m} \right)}\)

am

\(\theta_{m}\)

State

\(2 \pi f_{n} y_{PI}\)

Algebraic Equations#

Name

Symbol

Type

RHS of Equation "0 = g(x, y)"

PI_y

\(y_{PI}\)

Algeb

\(K_{p} V \sin{\left(\theta - \theta_{m} \right)} + xi_{PI} - y_{PI}\)

a

\(\theta\)

ExtAlgeb

\(0\)

v

\(V\)

ExtAlgeb

\(0\)

Blocks#

Name

Symbol

Type

Info

PI

\(PI\)

PIController

Config Fields in [PLL2]

Option

Symbol

Value

Info

Accepted values

allow_adjust

1

allow adjusting upper or lower limits

(0, 1)

adjust_lower

0

adjust lower limit

(0, 1)

adjust_upper

1

adjust upper limit

(0, 1)